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US Patent 7956387 Transistor and memory cell array

Patent 7956387 was granted and assigned to Qimonda on June, 2011 by the United States Patent and Trademark Office.

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Patent
Patent

Patent attributes

Current Assignee
Qimonda
Qimonda
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7956387
Patent Inventor Names
Till Schloesser0
Date of Patent
June 7, 2011
Patent Application Number
11517558
Date Filed
September 8, 2006
Patent Citations Received
‌
US Patent 11961916 Memory device
0
‌
US Patent 11864378 Semiconductor device and method for manufacturing semiconductor device
0
Patent Primary Examiner
‌
Kiesha R Bryant
Patent abstract

A transistor, which is formed in a semiconductor substrate having a top surface, includes first and second source/drain regions, a channel connecting the first and second source/drain regions, and a gate electrode for controlling an electrical current flowing in the channel. The gate electrode is disposed in a lower portion of a gate groove defined in the top surface of the semiconductor substrate. The upper portion of the groove is filled with an insulating material. The channel includes a fin-like portion in the shape of a ridge having a top side and two lateral sides in a cross-section perpendicular to a direction defined by a line connecting the first and second source/drain regions. The gate electrode encloses the channel at the top side and the two lateral sides thereof.

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