US Patent 7952168 Substrate strip for semiconductor packages

A substrate strip for semiconductor packages to slow the crack growth, primarily comprises a molding area and two side rails. The molding area includes a plurality of packaging units. The side rails are located outside the molding area and include two opposing longer sides of the substrate strip. A metal mesh is disposed on the side rails. The metal mesh consists of a plurality of crisscrossed wires having a plurality of isolated wire terminals at one edge of the metal mesh. Accordingly, crack growth is slowed by the specific metal mesh without damaging the packaging units. In one embodiment, the metal mesh is without boundary wires connecting to the isolated wire terminals to enhance the resistance to crack growth.