Patent attributes
A VCSEL array device formed of a monolithic array of VCSELs and short circuited mesas is disclosed. The VCSELs can be spaced symmetrically or asymmetrical, in a manner to improve power or speed, or in phase and in parallel. The VCSELs are connected to a first metal contact pad formed on a heat-spreading substrate. The short-circuited mesas are formed alongside the VCSELs and are bonded to and form a short circuit to a second metal contact pad on the grounding substrate. Each VCSEL is encompassed by a thick metal heat sink to increase the height of VCSEL mesas. The structure of the heat sink, the VCSELs and the shorting mesas reduce parasitic impedance thereby increasing output power and high frequency response. The VCSELs and shorting mesas can be packaged as a coplanar waveguide in a ground-signal-ground configuration that improves signal modulation characteristics.
