US Patent 7940563 Nonvolatile storage device and bias control method thereof

A nonvolatile storage device having a memory cell array composed of a plurality of memory cells. The plurality of memory cells include a bit line to which the drain terminals of the plurality of memory cells that have noncovalent connected gate terminals are commonly connected and a source line to which the source terminals of the plurality of memory cells that have commonly connected gate terminals are commonly connected and which extend perpendicularly to the bit line. The memory cell also includes a first source selector switch for connecting the source line to a source bias line.