Patent attributes
Techniques for biasing an amplifier using a replica circuit are disclosed. In an embodiment, a replica circuit having substantially the same topology and sizing as a push-pull amplifier circuit is coupled to a main push-pull amplifier circuit. A transistor in the replica circuit may be biased using feedback to generate a predetermined DC output voltage level, and such bias level may be applied to a corresponding transistor in the main push-pull amplifier circuit. In another embodiment, a transistor in a current bias module may be used to bias corresponding transistors in the main push-pull amplifier circuit and the replica circuit. Further techniques are disclosed for configuring the amplifier to have a non-uniform step size with finer resolution at lower power levels and coarser resolution at higher power levels to reduce power consumption at lower power levels.
