US Patent 7889553 Single-poly non-volatile memory cell

A non-volatile memory cell includes: a substrate including diffusion regions for a read-out transistor; a capacitor formed in a poly-silicon layer adjacent the substrate, the capacitor including a floating gate for the read-out transistor and a control gate, the floating gate and the control gate each having finger extensions, the finger extensions from the floating gate interdigitating with the finger extensions from the control gate; and