Patent attributes
The invention refers to a power amplifier comprising a first transistor (MH) having a first main channel coupled between a positive power supply terminal (Vdd) and an output terminal (Vout), said first transistor having a control terminal driven by a first gate signal (Vgatehigh) provided by a high driver circuit, which is biased from a first voltage terminal (Vboot). The power amplifier further comprises a second transistor (ML) having a second main channel coupled between the output terminal and a negative power supply terminal (Vss), said second transistor having a second control terminal driven by a second gate signal (Vgatelow) provided by a low driver circuit, which is biased from a second voltage terminal (Vreg), and a switch circuit (10) coupled between the first voltage terminal (Vboot) and the second voltage terminal (Vreg), said switch circuit being controlled by the second gate Signal (Vgatelow).
