US Patent 7888923 Dynamic phase manager for multi-phase switching regulators

An apparatus is provided. The apparatus comprises a current sensor, an error amplifier, a comparator, an analog-to-digital converter (ADC), control logic, and drivers. The error amplifier is adapted to receive a reference voltage and a feedback voltage, and the comparator has a first input terminal and a second input terminal, where the sum of at least a first portion of a common mode voltage and an output of the error amplifier is input into the first input terminal, and wherein the sum of at least a second portion of the common mode voltage and an output of the current sensor is input into the second input terminal. The ADC receives the sum of the second portion of the common mode voltage and the output of the current senor. Additionally, the ADC has a plurality of internal threshold voltages that are between the common mode voltage and an overcurrent limit adjustment voltage. The control logic receives an output from the comparator and the ADC, and the drivers are each adapted to receive at least one control signal from the control logic so as to provide drive signals to a converter.