Patent attributes
An exemplary embodiment of a synchronization device is provided. The synchronization device includes a memory, a demultiplexer, a comparator, and a sampling rate converter. The synchronization device has a system time clock (STC) and generates an output data with a first sampling rate. The demultiplexer receives a bit stream and extracts a packetized elementary stream (PES) from the bit stream. The demultiplexer writes the PES into the memory. The comparator obtains a presentation time stamp (PTS) from the PES and compares the PTS and the STC. The sampling rate converter has a converting factor, samples the PES in the memory, and generates the output data according to the PES. The sampling rate converter changes the converting factor according to the compared result of the comparator.
