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US Patent 7868456 Semiconductor device and method for fabricating the same

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Patent abstractTimelineTable: Further ResourcesReferences
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Patent
Patent
1

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
1
Patent Number
78684561
Patent Inventor Names
Hideki Kitada1
Takashi Suzuki1
Date of Patent
January 11, 2011
1
Patent Application Number
120191141
Date Filed
January 24, 2008
1
Patent Citations Received
‌
US Patent 11837645 Method of manufacturing a semiconductor device
2
Patent Primary Examiner
‌
Sue Purvis
1
Patent abstract

A semiconductor device in which the resistance of a copper wiring to electromigration is increased. The copper wiring is formed so that copper grains will be comparatively large in a central portion of the copper wiring and so that copper grains will be comparatively small in an upper portion and a lower portion of the metal wiring. The copper wiring having this structure is formed by a damascene method. This structure can be formed by controlling electric current density at electroplating time. With the copper wiring having this structure, it is easier for an electric current to run through the central portion than to run through the upper portion. As a result, the diffusion of copper atoms in the upper portion is suppressed and therefore the diffusion of copper atoms from an interface between the copper wiring and a cap film is suppressed.

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