Patent attributes
The invention relates to a circuit arrangement for detecting the overtemperature of a semiconductor body. The arrangement comprises at least one field effect transistor, having a parasitic diode, which is integrated in the semiconductor body, wherein the parasitic diode connects a load terminal of the field effect transistor to a bulk terminal of the semiconductor body, and comprising an evaluating unit electrically connected to the parasitic diode via the bulk terminal at the semiconductor body, which is constructed for feeding a current into the parasitic diode and evaluating a temperature-dependent voltage drop across the parasitic diode, the direction of the current fed into the diode being such that it is operated in the forward direction.