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US Patent 7820538 Method of fabricating a MOS device with non-SiO

Patent 7820538 was granted and assigned to Freescale Semiconductor on October, 2010 by the United States Patent and Trademark Office.

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Patent
Patent

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Current Assignee
Freescale Semiconductor
Freescale Semiconductor
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7820538
Patent Inventor Names
Vidya Kaushik0
Date of Patent
October 26, 2010
Patent Application Number
11911931
Date Filed
April 21, 2005
Patent Primary Examiner
‌
Charles D. Garber
Patent abstract

A polycrystalline silicon layer is deposited on a gate dielectric and then a portion thereof is re-oxidized so as to form a thin layer of oxide between the poly-Si layer and the underlying gate dielectric. Subsequently, the poly-Si layer is converted to a fully-silicided form so as to produce a FUSI gate. The gate dielectric can be a high-k material, for example a Hf-containing material, or SION, or another non-SiO2 dielectric. The barrier oxide layer is preferably less than 1 nm thick.

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