Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Yoshihiko Nishizawa0
Date of Patent
October 5, 2010
0Patent Application Number
116883620
Date Filed
March 20, 2007
0Patent Citations Received
Patent Primary Examiner
Patent abstract
A manufacturing method of a stacked module includes a step of fabricating the first wiring board which includes a wiring pattern provided on at least one of a surface and an inner portion and a bump electrode which is integrated from the simultaneous sintering with the wiring pattern, and which extends in the vertical direction, a step of layering the first wiring board with the second wiring board having the wiring pattern provided on at least one of the surface and the inner portion thereof to be connected to the second wiring board via the bump electrode.
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