Patent attributes
A current limiting circuit including a transistor is disclosed. The current limiting circuit is coupled with a voltage and includes a summing network, wherein a first voltage input of the summing network is capable of receiving a voltage that is proportional with the current flowing through the transistor. The current limiting circuit further including a differential circuit, wherein a first input of the differential circuit is coupled with an output of the summing network, a second input of the differential circuit is coupled with a voltage ramp signal, and an output of the differential circuit is coupled with a gate of the transistor. The current limiting circuit still further including a voltage divider network coupled between the drain of the transistor and the second voltage input of the summing network.