US Patent 7790561 Gate sidewall spacer and method of manufacture therefor
Patent 7790561 was granted and assigned to Texas Instruments on September, 2010 by the United States Patent and Trademark Office.
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The present invention provides a method for manufacturing a semiconductor device, a semiconductor device, and a method for manufacturing an integrated circuit including a semiconductor device. The method for manufacturing the semiconductor device, without limitation, may include providing a gate dielectric layer (413, 423) and a gate electrode layer (418, 428) over a substrate (310), and forming a gate sidewall spacer (610, 630) along one or more sidewalls of the gate dielectric layer (413, 423) and the gate electrode layer (418, 428) using a plasma enhanced chemical vapor deposition process, and forming different hydrogen concentration in NMOS and PMOS sidewall spacers (610, 630) using a local hydrogen treatment (LHT) method.
US Patent 07790561 Gate sidewall spacer and method of manufacture therefor US Patent 7790561 Gate sidewall spacer and method of manufacture therefor
US Patent 07790561 Gate sidewall spacer and method of manufacture therefor
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