Patent attributes
A semiconductor device has a plurality of bit lines BL provided in a memory cell area 101, a plurality of word lines WL provided crossing the plurality of bit lines BL, a plurality of diffusion source lines VSL provided along the plurality of word lines WL, a plurality of non-volatile active cells AC storing data, the plurality of non-volatile active cells AC being provided at cross sections of the plurality of bit lines BL and the plurality of word lines WL and being connected to the plurality of bit lines BL, the plurality of word lines WL, and the plurality of diffusion source lines VSL, and a controller simultaneously writes or reads data to and from at least two active cells AC among the plurality of active cells AC, in which the number of the plurality of active cells AC is less than that of the cross sections.
