Patent attributes
Disclosed is a chip resistor 1 that includes a ceramic substrate 2, a pair of bank-raising foundation sections 3 positioned on both longitudinal ends of the lower surface of the ceramic substrate 2, a pair of first electrode layers 4 that cover at least parts of the bank-raising foundation sections 3 and are positioned at a predetermined distance from each other, a resistive element 5 that is made mainly of a copper-nickel alloy to bridge the first electrode layers 4, a pair of second electrode layers 6 that cover the pair of first electrode layers 4, and an insulating protective layer 7 that covers the resistive element 5. Further, end-face electrodes 9 are positioned on both longitudinal end faces of the ceramic substrate 2. The second electrode layers 6 and end-face electrodes 9 are covered with plating layers 10-13. This chip resistor 1 is to be face-down mounted with the first and second electrodes 4, 6 positioned on a wiring pattern 21 of a circuit board 20.
