Patent attributes
A ramp adjustment circuit for a voltage converter including a gate driver for controlling series connected high- and low-side switches connected across DC voltage and coupled at an output node connected to a load through an inductor such that the converter operates in a continuous conduction mode (CCM) or a discontinuous conduction mode (DCM). The circuit includes a first current generating circuit for providing a first current signal for generating a first ramp signal; a second current generating circuit for providing a second reduced current signal for generating a second ramp signal having a reduced slope when the first current generating circuit is disabled and the second current generating circuit is enabled; and a circuit for enabling the first current generating circuit and disabling the second current generating circuit when the converter is in CCM and enabling the second current generating circuit and disabling the first current generating circuit when the converter is in DCM thereby providing the first current signal when the converter is in CCM to provide the first ramp signal and providing the second reduced current signal when the converter is in DCM to provide the second reduced slope ramp signal.