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Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Takashi Hase0
Date of Patent
August 17, 2010
0Patent Application Number
120484820
Date Filed
March 14, 2008
0Patent Primary Examiner
Patent abstract
According to the present invention, it is provided a method of manufacturing a semiconductor device comprising a PMOS transistor and an NMOS transistor, wherein the method facilitates obtaining a full silicide phase of a suitable composition for the NMOS transistor and the PMOS transistor respectively, with fewer mask layers and through a fewer number of manufacturing steps.
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