Patent attributes
An electrical surge protection device (12) confers protection to an output node (13) from electrical surges on a data or power line (10) incident on an input node (11). A transistorized surge protection device (18) is located in a current path between the input node (11) and the output node (13) and is configured to assume an isolating state in response to an over-current therethrough. A voltage-triggered protective circuit comprising a diac (16) in series with a bi-directional zener diode (14) is connected between the output side of the transistorized surge protection device (18) and a surge sinking node (15). The voltage-triggered circuit assumes a low-impedance state in response to an electrical surge at output terminal 13. Consequently a surge current is passed through zener diode (14) and surge diac (16) to the surge sinking node. In response to the surge current the transistorized surge protection device (18) assumes a high impedance configuration thereby isolating output node (13) from input node (11). Since neither the zener diode and diac combination, nor the transistorized surge protection device (18) are subject to sustained surge associated currents, embodiments of the invention can be compactly packaged.
