US Patent 7765534 Compiler with cache utilization optimizations
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Patent abstract
A compiling program with cache utilization optimizations employs an inter-procedural global analysis of the data access patterns of compile units to be processed. The global analysis determines sufficient information to allow intelligent application of optimization techniques to be employed to enhance the operation and utilization of the available cache systems on target hardware.
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Patent Inventor Names
Robert J. Blainey0
Roch G. Archambault0
Yaoqing Gao0
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US Patent 07765534 Compiler with cache utilization optimizations US Patent 7765534 Compiler with cache utilization optimizations
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Patent Number
07765534
Patent Number
7765534
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Official Website
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US Patent 07765534 Compiler with cache utilization optimizations
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Is a
Patent jurisdiction
Patent number
07765534
Date of patent
July 27, 2010
Patent application number
10835756
Date Filed
April 30, 2004
Patent primary examiner
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