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US Patent 7749809 Methods and systems for packaging integrated circuits

Patent 7749809 was granted and assigned to National Semiconductor on July, 2010 by the United States Patent and Trademark Office.

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Current Assignee
National Semiconductor
National Semiconductor
Date Filed
December 17, 2007
Date of Patent
July 6, 2010
Patent Application Number
11958288
Patent Citations Received
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US Patent 11760682 Glass or glass ceramic articles with copper-metallized through holes and processes for making the same
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US Patent 12131985 Hermetic metallized via with improved reliability
0
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US Patent 11972993 Silica-containing substrates with vias having an axially variable sidewall taper and methods for forming the same
0
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US Patent 11658098 Leadframe package with side solder ball contact and method of manufacturing
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US Patent 11774233 Method and system for measuring geometric parameters of through holes
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7749809
Patent Primary Examiner
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David A Zarneke

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