US Patent 7680265 Echo canceler circuit and method

An echo canceller circuit (200) and method performs cascaded echo cancellation and noise suppression in a non-interfering manner. The echo canceller circuit (200) includes pre-noise suppression logic (210), echo canceller coefficient logic (218), noise suppression logic (212) and an echo canceller filter (216). The pre-noise suppression logic (210) receives pre-echo canceller uplink data (64) and downlink data (52), and in response produces pre-noise suppression uplink data (224). The echo canceller coefficient logic (218) receives the pre-noise suppression uplink data (224) and the pre-echo canceller uplink data (64), and in response produces filter coefficient data (226). The noise suppression logic (212) receives the pre-noise suppression uplink data (224), and in response produces noise suppressed uplink data (228). The echo canceller filter (216) receives the noise suppressed uplink data (228) and the filter coefficient data (226) and in response produces final uplink data (230).