Patent attributes
A CMOS structure and a method for fabricating the CMOS structure include a first transistor located within a first semiconductor substrate region having a first polarity. The first transistor includes a first gate electrode that includes a first metal containing material layer and a first silicon containing material layer located upon the first metal containing material layer. The CMOS structure also includes a second transistor located within a laterally separated second semiconductor substrate region having a second polarity that is different than the first polarity. The second transistor includes a second gate electrode comprising a second metal containing material layer of a composition that is different than the first metal containing material layer, and a second silicon containing material layer located upon the second metal containing material layer. The first silicon containing material layer and the first semiconductor substrate region comprise different materials. The second silicon containing material layer and the second semiconductor substrate region also comprise different materials.