US Patent 7659760 PLL circuit and semiconductor integrated device

A charge pump circuit comprises two MOS transistors serially connected between a power supply voltage VDD and ground, a switch SW0, four switches SW1 through SW4, four capacitors C1 through C4, and four switches SW5 through SW8. If a control voltage Vcntl is to be varied, a specific switch SW of the switches SW1 through SW4 is turned on such that a specific capacitor is charged to the power supply voltage VDD. Then, a specific switch SW of the switches SW5 through SW8 is turned on to transfer the electric charge stored in the capacitor to the capacitor of a low-pass filter and thereby the control voltage is controlled at a desired value.