US Patent 7652290 Standby current erasion circuit of DRAM

Patent 7652290 was granted and assigned to Winbond Electronics on January, 2010 by the United States Patent and Trademark Office.

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Is a

Patent

Patent attributes

Current Assignee

Winbond Electronics

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

76522900

Patent Inventor Names

Yu-Chang Lin0

Date of Patent

January 26, 2010

Patent Application Number

102324600

Date Filed

August 30, 2002

Patent Primary Examiner

‌

Peter Dungba Vo

Patent abstract

The present invention discloses a standby current erasion circuit applied in DRAM, which improves prior art word line driving circuit to have the word line voltage outputted in standby mode be equal to the bit line voltage, thereby the short DC standby current between the word line and bit line can be erased.