Patent attributes
A bumping process and a structure thereof are provided. The bumping process includes the following steps. Firstly, a wafer having a number of pads is provided. Next, a UBM layer is formed on the pad. Then, a conductive first photo-resist layer is coated on the wafer to cover the UBM layer. Next, a second photo-resist layer is coated on the first photo-resist layer. Then, at least a portion of the second photo-resist layer is removed to form an opening above the UBM layer. The first photo-resist layer maintains electric connection with the UBM layer. Next, a solder layer is formed in the opening by electroplating process. Then, the first photo-resist layer and the second photo-resist layer are removed expect the portion of the first photo-resist layer under the solder layer.
