US Patent 7649250 Semiconductor package

Provided are a semiconductor package and a method for manufacturing the same. The semiconductor package includes: a substrate having a top surface on which a lead is formed and a bottom surface opposite to the top surface; a semiconductor chip attached to the top surface of the substrate and having an active surface on which a chip pad is formed and a back surface opposite to the active surface; a redistribution pattern electrically connected to the chip pad and extending from the active surface to a lateral surface of the semiconductor chip; and an interconnector electrically connecting the redistribution to the lead on the lateral surface of the semiconductor chip.