Patent attributes
A switching device comprises M ports, N bandwidth tracking modules, a mapping memory, and a rate limiting module. The N bandwidth tracking modules each have an adjustable first threshold, an adjustable rate, and a fullness level, wherein M and N are integers that are greater than one. The mapping memory contains a map for each of the M ports, wherein each map assigns a set of the N bandwidth tracking modules to a corresponding one of the M ports, wherein each of the sets is individually modifiable to include zero to N of the N bandwidth tracking modules. The rate limiting module that selectively performs an action on a packet received at one of the M ports based on the fullness levels of the set of N bandwidth tracking modules identified by the map for the one of the M ports.
