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US Patent 7646101 Semiconductor device and manufacturing method thereof

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Patent abstractTimelineTable: Further ResourcesReferences
Is a
Patent
Patent
1

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
1
Patent Number
76461011
Patent Inventor Names
Ryotaro Yagi1
Shinichi Chikaki1
Yoshinori Shishida1
Date of Patent
January 12, 2010
1
Patent Application Number
117297651
Date Filed
March 28, 2007
1
Patent Citations Received
‌
US Patent 11715752 Semiconductor device and method for production of semiconductor device
2
Patent Primary Examiner
‌
Jack Chen
1
Patent abstract

An insulating layer is formed on a semiconductor substrate, and has a through hole for via. A porous silica layer has a trench for interconnection communicating to the through hole for via, and is formed on the insulating layer in contact therewith. A conductive layer is formed in the through hole for via and in the trench for interconnection. The insulating layer is formed from a material containing carbon, hydrogen, oxygen, and silicon, and having absorption peak attributed to Si—CH3 bond in a range from at least 1260 cm−1 to at most 1280 cm−1 (around 1274 cm−1) when measured with FT-IR. Thus, a semiconductor device having a porous insulating layer in which depth of the trench for interconnection is readily controlled, a dielectric constant is low, and increase in leakage current is less likely, as well as a manufacturing method thereof can be obtained.

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