Patent attributes
A bus system includes a bus and first and second bus interfaces, along with at least one data line that transmits data between the first and second bus interfaces. The bus system also includes first and second bus control devices, where the first bus control device is allocated to the first bus interface and the second bus control device is allocated to the second bus interface. First and second signaling lines signal a respective state of each of the first and second bus control devices and a third signaling line signals an exchange of data. A clock line is included that synchronizes the bus system by a clock. The first and second bus control devices each generate a control word having control information that relates to the data transmitted on the at least one data line. Also, the first and second bus control devices each transmit the control word through the at least one data line, and the first and second bus control devices receive the transmitted control word and relay the received data on the at least one data line based on the control information contained in the control word to at least one additional connected device.
