Is a
Patent attributes
Current Assignee
0
Patent Jurisdiction
Patent Number
Patent Inventor Names
Kwang Young Kim0
Wynstan Tong0
Chun-Ying Chen0
Hui Pan0
Michael Le0
Date of Patent
November 24, 2009
0Patent Application Number
116378010
Date Filed
December 13, 2006
0Patent Citations Received
Patent Primary Examiner
Patent abstract
A method and apparatus to counter effects of an offset voltage by calibrating an analog-to-digital converter (ADC). A digital calibration loop minimizes the effects of offset voltage to improve ADC accuracy as well as provide a low-power, submicron-scale ADC. A calibration circuit senses an ADC output and adjusts a variable calibration voltage to counter the effects of the offset voltage. Reduction of the offset voltage effects increases the ADC accuracy.
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