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US Patent 7620791 Mapping memory in a parallel processing environment

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Is a
Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7620791
Patent Inventor Names
David Wentzlaff0
Matthew Mattina0
Anant Agarwal0
Date of Patent
November 17, 2009
Patent Application Number
11404207
Date Filed
April 14, 2006
Patent Citations Received
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US Patent 12132648 System and method for facilitating efficient load balancing in a network interface controller (NIC)
0
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US Patent 11985060 Dragonfly routing with incomplete group connectivity
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US Patent 11991072 System and method for facilitating efficient event notification management for a network interface controller (NIC)
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US Patent 12003411 Systems and methods for on the fly routing in the presence of errors
0
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US Patent 12021738 Deadlock-free multicast routing on a dragonfly network
0
0
0
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US Patent 11750504 Method and system for providing network egress fairness between applications
...
Patent Primary Examiner
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Pierre-Michel Bataille
Patent abstract

An integrated circuit comprises a plurality of tiles. Each tile comprises a processor, and a switch including switching circuitry to forward data received over data paths from other tiles to the processor and to switches of other tiles, and to forward data received from the processor to switches of other tiles. The integrated circuit further includes a plurality of memory interface modules including circuitry to access a respective external memory, each memory interface module coupled to a switch of at least one tile. At least some of the tiles are configured to access an address in an external memory by sending from the switch a packet that includes a physical memory address that includes the external memory address and information identifying the corresponding external memory.

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