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US Patent 7615385 Double-masking technique for increasing fabrication yield in superconducting electronics

Patent 7615385 was granted and assigned to HYPRES on November, 2009 by the United States Patent and Trademark Office.

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Patent
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Patent attributes

Current Assignee
HYPRES
HYPRES
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7615385
Patent Inventor Names
Sergey K. Tolpygo0
Date of Patent
November 10, 2009
Patent Application Number
11616382
Date Filed
December 27, 2006
Patent Citations Received
‌
US Patent 11747196 Integrated superconducting nanowire digital photon detector
Patent Primary Examiner
‌
Ha Tran T Nguyen
Patent abstract

A new technique is presented for improving the microfabrication yield of Josephson junctions in superconducting integrated circuits. This is based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so as to a) maximize adhesion between the resist and the underlying superconducting layer, b) be etch-compatible with the underlying superconducting layer, and c) be insoluble in the resist and anodization processing chemistries. In a preferred embodiment of the invention, the superconductor is niobium, the material on top of this is silicon dioxide, and the top layer is conventional photoresist or electron-beam resist. The use of this combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits due to increase in junction uniformity and reduction in defect density. An additional improvement over the prior art involves the replacement of a wet-etch step with a dry etch more compatible with microlithography.

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