US Patent 7602006 Semiconductor flash device

A flash memory device includes a floating gate made of a multi-layered structure. The floating gate includes a hetero-pn junction which serves as a quantum well to store charge in the floating gate, thus increasing the efficiency of the device, allowing the device to be operable using lower voltages and increasing the miniaturization of the device. The floating gate may be used in n-type and p-type devices, including n-type and p-type fin-FET devices. The stored charge may be electrons or holes.