Patent attributes
An analog to digital converter (ADC) with interference rejection capability and method thereof are disclosed. The ADC includes a threshold generator, a comparator circuit, a counter and an integrator. By comparing a signal with positive and negative threshold signals from the threshold generator, the comparator circuit converts the signal from analog to digital based on the result of the comparison. The counter counts a percentage of the digital signal and generates a bit signal based on the counted percentage. In response to the bit signal, the integrator supplies a control signal to the threshold generator to regulate the positive and negative threshold signals so as to maintain the counted percentage at a predetermined percentage threshold.
