Patent attributes
A FLASH memory device is provided including a plurality of first floating gates formed over a gate oxide layer formed over a substrate, the first group of floating gates being formed using a selected photolithography process associated with a minimum line width; a second group of floating gates including a plurality of second floating gates, wherein the first and second floating gates are disposed in series, with individual ones of the second floating gates disposed between respective ones of the first floating gates; a plurality of spacers, individual ones of the spacers disposed between adjacent ones of the first and second floating gates; a plurality of control gates associated with the floating gates, wherein the spacers and/or the second floating gates have widths less than the minimum line width.
