Patent 7585706 was granted and assigned to Panasonic on September, 2009 by the United States Patent and Trademark Office.
The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.