Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Peter Beerel0
Andrew Lines0
Michael Davies0
Date of Patent
September 1, 2009
Patent Application Number
11271323
Date Filed
November 10, 2005
Patent Primary Examiner
Patent abstract
Methods and apparatus are described for optimizing a circuit design. A gate level circuit description corresponding to the circuit design is generated. The gate level circuit description includes a plurality of pipelines across a plurality of levels. Using a linear programming technique, a minimal number of buffers is added to selected ones of the pipelines such that a performance constraint is satisfied.
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