US Patent 7563673 Method of forming gate structure of semiconductor device

Disclosed herein is a method for forming a gate structure of a semiconductor device. The method comprises forming a plurality of gates including a first gate dielectric film, a first gate conductive film, and a gate silicide film sequentially stacked on a silicon substrate having a field oxide film, forming a thermal oxide film on a side of the first gate conductive film, etching the silicon substrate exposed between the plurality of gates to a predetermined depth to form a plurality of trenches, forming a second gate oxide film on the interior wall of the trenches, and forming a second gate conductive film in a spacer shape on a predetermined region of the second gate oxide film, and on a side of the first gate conductive film, the gate silicide film, and the thermal oxide film.