Patent attributes
A nonvolatile memory consisting of a substrate, a dielectric layer, word lines, word gates, conductive spacers, electron trapping layer, insulation layer and buried bit lines is provided. The dielectric layer is on the substrate and has several poly trenches thereon, and the word lines are disposed over the substrate across the poly trenches. The word gates are in the poly trenches between the word lines and the substrate, and the conductive spacers are between the word gates and the inner wall of each poly trench. The electron trapping layer is disposed between the conductive spacers and the inner wall of each poly trench and between the conductive spacers and the substrate. The insulation layer is between the conductive spacers and the word gates. The buried bit lines are in the substrate between the poly trenches.
