Patent attributes
The present disclosure relates to methods of forming a flash memory device. A plurality of cells, a plurality of select transistors, and a transistor are formed over a semiconductor substrate including a cell region and a peripheral region. An insulating layer is formed on the entire surface. Metal contact holes are etched and filled with a metal contact layer. Drain contact holes are also etched and filled with a drain contact layer. The order of the metal contact layer formation and drain contact layer formation can be reversed. A single chemical mechanical polishing step is performed to remove the top portions of the metal and drain contact layers, thereby exposing the top surface of the interlayer insulating layer and simultaneously forming both the metal and drain contacts.
