Patent 7544899 was granted and assigned to Keihin Corporation on June, 2009 by the United States Patent and Trademark Office.
In a printed circuit board on which a first conductor pattern, a second conductor pattern of smaller area than the first conductor pattern and electronic components are mounted, a gap between a first through-hole connected to the first conductor pattern and a first lead pin inserted therein is defined to be larger than that between a second through-hole connected to the second conductor pattern and a second lead pin. With this, it becomes possible to improve solder rise property, without increasing the number of electronic component production processes or degrading strength with respect to the electronic component.