Patent attributes
A high speed quadrature counter for use with a displacement measuring device is disclosed. The counter provides high speed counting by partitioning the tracking counter into a small fast tracking counter portion for the LSBs and a larger slow tracking counter portion for the MSBs. The fast tracking counter portion outputs a smaller number of bits according to a fast clock rate, while the slow tracking counter portion outputs a larger number of bits to update the remainder of the position at a slower clock rate. In various embodiments, the counter provides a corrected position value that has an effective timing within a few fast clock cycles of the time of the latch trigger signal. A corrected latched position circuit corrects an error that may otherwise be produced by the partitioning and the different clock rates of the fast and slow tracking counter portions.
