Patent attributes
The circuit comprises an amplitude setting transistor 5Q for controlling the amplitude of high-frequency current I2QB flowing through the second current mirror circuit 2, by using an input of reference direct current signal Bias. Direct current component I4QB generated based on reference direct current signal Bias is subtracted from direct current I1 flowing through the other side line of the first current mirror circuit 1. In this case, level fluctuation of driving current IZ can be significantly suppressed, since the increment of the direct current component included in high-frequency current I2QB is proportional to direct current component I4QB which is subtracted from direct current I1 flowing through said other side line of the first current mirror circuit 1.
