US Patent 7529071 Circuit for selectively bypassing a capacitive element

A circuit for selectively bypassing a capacitive element includes at least one NMOS device selectively connectable across the capacitive element to be bypassed, and at least first and second PMOS devices. The PMOS devices are selectively connectable together in series across the capacitive element to be bypassed. The NMOS device provides a first bypass path and the first and second PMOS devices collectively provide a second bypass path.