Patent 7518932 was granted and assigned to Intel on April, 2009 by the United States Patent and Trademark Office.
Erase cycle counting may be used for a non-volatile memory to balance the cycles on memory blocks or partitions. In some embodiments, the non-volatile memory may include two memory locations such as wordlines associated with each block of memory. The wordlines may be alternately erased so that an updated cycle count is transferred from the wordlines to the other. In the case of a power loss in the course of the updating of the cycle count, a method may detect that the data is in improper states and require that the erase be restarted after the power loss in order to recover the correct erase cycle count.