US Patent 7515492 Semiconductor memory device

A semiconductor memory device having a bit line sense amplifier supporting an over driving operation includes a voltage divider; a plurality of signal converters; a delay unit; and a drive control signal generator. The voltage divider divides an external voltage to generate a plurality of different voltage levels. The signal converters convert each of the plurality of voltage levels into a corresponding digital signal. The delay unit delays an active signal provided from outside by a delay amount for defining an over driving interval in response to the plurality of digital signals. The drive control signal generator generates a drive control signal for a bit line sense amplifier driver in response to a delayed active signal from the delay unit.