US Patent 7511988 Static noise-immune SRAM cells

A static random access memory (SRAM) cell includes a first load device, a first pull-down transistor, and a switch-box coupled between the first load device and the first pull-down transistor. The switch-box is configured to receive a switch control signal to turn off a first connection between the first load device and the first pull-down transistor during read operations of the SRAM cell and to turn on the first connection during write operations.