US Patent 7501345 Selective silicide formation by electrodeposit displacement reaction

Silicide formation processes are disclosed that use an electrochemical displacement reaction in the absence of an externally applied current or potential. In an embodiment, a method for forming an integrated circuit comprises: depositing a metallic material upon select areas of a semiconductor topography comprising silicon by contacting the semiconductor topography with an aqueous solution comprising an acid and a metal salt to cause an electrochemical displacement reaction in the absence of an externally applied current or potential, wherein a concentration of the metal salt in the aqueous solution is about 0.01 millimolar to about 0.5 millimolar; and annealing the metallic material to form a silicide upon the areas of the semiconductor topography comprising the silicon.